| ~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/37 - Using Vivado Interrupt Template Code P2.mp4 | 213.64 MB |
| ~Get Your Files Here !/8 - Adding Master Interface/45 - Creating Master Interface with Vivado Template P1.mp4 | 162.54 MB |
| ~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/42 - Blinking Effect with Interrupt.mp4 | 150.74 MB |
| ~Get Your Files Here !/6 - Adding Interrupts to Slave Lite Interfaces/33 - Adding Interrupt with RTL P2.mp4 | 149.24 MB |
| ~Get Your Files Here !/10 - AXI Stream Master Interface with Vivado Template/55 - Creating AXIS Master Interface P1.mp4 | 145.25 MB |
| ~Get Your Files Here !/9 - AXI Stream Slave Interface with Vivado Template/49 - Building AXIS Slave Interface P1.mp4 | 138.81 MB |
| ~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/36 - Using Vivado Interrupt Template Code P1.mp4 | 100.08 MB |
| ~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/23 - Analyzing Signals on ILA Probe.mp4 | 98.17 MB |
| ~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/25 - Add Existing RTL Delay Generator P1.mp4 | 93.72 MB |
| ~Get Your Files Here !/6 - Adding Interrupts to Slave Lite Interfaces/32 - Adding Interrupt with RTL P1.mp4 | 90.41 MB |
| ~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/21 - Other Signals in Slave Lite Interface.mp4 | 89.56 MB |
| ~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/27 - Adding Existing RTL Multiplier P1.mp4 | 83.11 MB |
| ~Get Your Files Here !/6 - Adding Interrupts to Slave Lite Interfaces/31 - Fundamentals of Interrupt C Application.mp4 | 80.58 MB |
| ~Get Your Files Here !/2 - Building AXI Slave Lite Interface Using Vivado Template without I O ports/7 - Slave Lite Interface without I O Ports P4 Creating C Application.mp4 | 76.31 MB |
| ~Get Your Files Here !/9 - AXI Stream Slave Interface with Vivado Template/50 - Building AXIS Slave Interface P2.mp4 | 65.48 MB |
| ~Get Your Files Here !/9 - AXI Stream Slave Interface with Vivado Template/52 - Building Complex FSM with existing FSM for AXIS.mp4 | 63.95 MB |
| ~Get Your Files Here !/8 - Adding Master Interface/46 - Creating Master Interface with Vivado Template P2.mp4 | 62.7 MB |
| ~Get Your Files Here !/11 - AXIS Slave Interface with Verilog/60 - Building AXIS Slave Interface with Verilog P2.mp4 | 61.62 MB |
| ~Get Your Files Here !/12 - AXIS Master Slave Interface with Verilog/64 - Building AXIS Master Slave Interface with Verilog P1.mp4 | 57.49 MB |
| ~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/39 - Modifying Delay of the Vivado Interrupt Template.mp4 | 55.32 MB |
| ~Get Your Files Here !/2 - Building AXI Slave Lite Interface Using Vivado Template without I O ports/4 - Slave Lite Interface without I O Ports P1 Creating IP.mp4 | 55.29 MB |
| ~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/29 - Adding Exisitng RTL COMPLEX FSM P1.mp4 | 54.73 MB |
| ~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/11 - Adding Output port to Slave Lite Interface P1.mp4 | 50.31 MB |
| ~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/15 - Adding Input and Output ports to Slave Lite Interface P2.mp4 | 49.34 MB |
| ~Get Your Files Here !/2 - Building AXI Slave Lite Interface Using Vivado Template without I O ports/5 - Slave Lite Interface without I O Ports P2 Creating IP.mp4 | 49.33 MB |
| ~Get Your Files Here !/1 - Section 0 Course Framework/2 - Course Framework.mp4 | 47.72 MB |
| ~Get Your Files Here !/12 - AXIS Master Slave Interface with Verilog/65 - Building AXIS Master Slave Interface with Verilog P2.mp4 | 45.1 MB |
| ~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/14 - Adding Input and Output ports to Slave Lite Interface P1.mp4 | 44.79 MB |
| ~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/26 - Add Existing RTL Delay Generator P2.mp4 | 43.79 MB |
| ~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/28 - Adding Existing RTL Multiplier P2.mp4 | 43.26 MB |
| ~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/40 - Generating Continuous Interrupt P1.mp4 | 41.46 MB |
| ~Get Your Files Here !/2 - Building AXI Slave Lite Interface Using Vivado Template without I O ports/6 - Slave Lite Interface without I O Ports P3 Creating IP.mp4 | 39.17 MB |
| ~Get Your Files Here !/2 - Building AXI Slave Lite Interface Using Vivado Template without I O ports/8 - Slave Lite Interface without I O Ports P5 Creating C Application.mp4 | 38.35 MB |
| ~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/22 - Block Design used in Demonstration.mp4 | 37.97 MB |
| ~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/12 - Adding Output port to Slave Lite Interface P2.mp4 | 37.13 MB |
| ~Get Your Files Here !/11 - AXIS Slave Interface with Verilog/59 - Building AXIS Slave Interface with Verilog P1.mp4 | 37.08 MB |
| ~Get Your Files Here !/10 - AXI Stream Master Interface with Vivado Template/56 - Creating AXIS Master Interface P2.mp4 | 35.32 MB |
| ~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/13 - Adding Output port to Slave Lite Interface P3.mp4 | 33.58 MB |
| ~Get Your Files Here !/13 - Understanding Common Errors/69 - Common Error 2.mp4 | 24.78 MB |
| ~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/18 - Understanding Mandatory Signal Master Write to Slave (Writing Ops) P1.mp4 | 24.55 MB |
| ~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/19 - Understanding Mandatory Signal Master Write to Slave (Writing Ops) P2.mp4 | 23.98 MB |
| ~Get Your Files Here !/11 - AXIS Slave Interface with Verilog/61 - Building AXIS Slave Interface with Verilog P3.mp4 | 23.33 MB |
| ~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/16 - Adding Input and Output ports to Slave Lite Interface P3.mp4 | 22.98 MB |
| ~Get Your Files Here !/7 - Adding Interrupts with Vivado Template/41 - Generating Continuous Interrupt P2.mp4 | 21.83 MB |
| ~Get Your Files Here !/13 - Understanding Common Errors/68 - Common Error 1.mp4 | 19.06 MB |
| ~Get Your Files Here !/4 - Understanding AXI4-Lite Signals/20 - Understanding Mandatory Signal Master read from Slave (Reading Ops).mp4 | 12 MB |
| ~Get Your Files Here !/1 - Section 0 Course Framework/1 - Interface Type.mp4 | 11.34 MB |
| ~Get Your Files Here !/5 - Adding AXI Lite Interface for existing Verilog Code/24 - Agenda.mp4 | 4.98 MB |
| ~Get Your Files Here !/9 - AXI Stream Slave Interface with Vivado Template/48 - Agenda.mp4 | 2.65 MB |
| ~Get Your Files Here !/3 - Building AXI Slave Lite Interface Using Vivado Template with I O ports/10 - Agenda.mp4 | 2.64 MB |